Short Bio
Dr. Nagender Aneja is a Collegiate Associate Professor at the Bradley Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, Virginia, USA. He has previously worked as a Visiting Research Scholar in the Department of Computer Science at Purdue University, West Lafayette, Indiana. At Purdue University, he worked with Prof Bharat K Bhargava and collaborated with Sandia National Laboratories to enhance cybersecurity in space computing platforms. He served as an Assistant Professor in the School of Digital Science at Universiti Brunei Darussalam, Brunei, where he won the ICT Industry Award at the Brunei Info-Communication Technology Awards (BICTA) 2016. He has five years of industry experience as an Associate IP Lead for the Microsoft Patent Research Services Team at CPA Global India (now Clarivate), where he drafted the responses to Office Actions for US Patent Applications and developed various innovative NLP tools for patent analysis.
He received his Ph.D. in Computer Engineering from J.C. Bose University of Science and Technology, YMCA, India, and his M.E. in Computer Technology and Applications from Delhi College of Engineering (now Delhi Technological University). He has held academic positions at several academic institutes in India.
His area of expertise is in applied machine learning, and he has mentored undergraduate and graduate students in domains such as cybersecurity, large language models, medical imaging, natural language processing, and adversarial machine learning. He also contributed to the NL-Augmenter, a large-scale collaborative effort to develop transformations for natural-language datasets. He has published over 45 research papers and holds two US Patents. He was also a judge for the QS Reimagine Education Awards 2023-2025.
Editor/Judge
- Special Issue Editor, Symmetry/Asymmetry in Data Mining and Machine Learning, Symmetry (ISSN 2073-8994), indexed in SCIE; Scopus (Deadline for Submissions: 27 April 2026)
- Special Issue Guest Editor, Intelligent and Secure Wireless Network Sensing: Techniques, Architectures, and Real-World Applications, Sensors (ISSN: 1424-8220), indexed in SCIE Scopus (Deadline for Submissions: 31 March 2026)
- Judge, QS Reimagine Education Awards 2023-2025
Contact
Office
Bradley Department of Electrical and Computer Engineering
Virginia Tech
352 Whittemore Hall
Blacksburg, VA 24061
+1(540) 231-2118
naneja@vt.edu
Mailing Address:
1185 Perry Street
453 Whittemore (0111)
Virginia Tech
Blacksburg, VA 24061